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AS31: 8051 Family Instruction Set

INSTRUCTION                             BYTES     CYCLES
-----------                             -----     ------
ACALL     addr11                        2         24
ADD       A, #data8                     2         12
ADD       A, @Ri                        1         12
ADD       A, Rn                         1         12
ADD       A, direct                     2         12
ADDC      A, #data8                     2         12
ADDC      A, @Ri                        1         12
ADDC      A, Rn                         1         12
ADDC      A, direct                     2         12
AJMP      addr11                        2         24
ANL       A, #data8                     2         12
ANL       A, @Ri                        1         12
ANL       A, Rn                         1         12
ANL       A, direct                     2         12
ANL       C, /bit                       2         24
ANL       C, !bit                       2         24
ANL       C, bit                        2         24
ANL       direct, #data8                3         24
ANL       direct, A                     2         12
CJNE      @Ri, #data8, rel              3         24
CJNE      A, #data8, rel                3         24
CJNE      A, direct, rel                3         24
CJNE      Rn, #data8, rel               3         24
CLR       A                             1         12
CLR       C                             1         12
CLR       bit                           2         12
CPL       A                             1         12
CPL       C                             1         12
CPL       bit                           2         12
DA        A                             1         12
DEC       @Ri                           1         12
DEC       A                             1         12
DEC       DPTR                          1         12
DEC       Rn                            1         12
DEC       direct                        2         12
DIV       AB                            1         48
DJNZ      Rn, rel                       2         24
DJNZ      direct, rel                   3         24
INC       @Ri                           1         12
INC       A                             1         12
INC       DPTR                          1         24
INC       Rn                            1         12
INC       direct                        2         12
JB        bit, rel                      3         24
JBC       bit, rel                      3         24
JC        relative                      2         24
JMP       @A + DPTR                     1         24
JMP       @DPTR + A                     1         24
JNB       bit, rel                      3         24
JNC       relative                      2         24
JNZ       relative                      2         24
JZ        relative                      2         24
LCALL     addr16                        3         24
LJMP      addr16                        3         24
MOV       @Ri, #data8                   2         12
MOV       @Ri, A                        1         12
MOV       @Ri, direct                   2         24
MOV       A, #data8                     2         12
MOV       A, @Ri                        1         12
MOV       A, Rn                         1         12
MOV       A, direct                     2         12
MOV       C, bit                        2         12
MOV       DPTR, #data16                 3         24
MOV       Rn, #data8                    2         12
MOV       Rn, A                         1         12
MOV       Rn, direct                    2         24
MOV       bit, C                        2         24
MOV       direct, #data8                3         24
MOV       direct, @Ri                   2         24
MOV       direct, A                     2         12
MOV       direct, Rn                    2         24
MOV       direct, direct                3         24
MOVC      A, @A + DPTR                  1         24
MOVC      A, @A + PC                    1         24
MOVC      A, @DPTR + A                  1         24
MOVC      A, @PC + A                    1         24
MOVX      @DPTR, A                      1         12
MOVX      @Ri, A                        1         24
MOVX      A, @DPTR                      1         24
MOVX      A, @Ri                        1         24
MUL       AB                            1         48
NOP                                     1         12
ORL       A, #data8                     2         12
ORL       A, @Ri                        1         12
ORL       A, Rn                         1         12
ORL       A, direct                     2         12
ORL       C, /bit                       2         24
ORL       C, !bit                       2         24
ORL       C, bit                        2         24
ORL       direct, #data8                3         24
ORL       direct, A                     2         12
POP       direct                        2         24
PUSH      direct                        2         24
RET                                     1         24
RETI                                    1         24
RL        A                             1         12
RLC       A                             1         12
RR        A                             1         12
RRC       A                             1         12
SETB      A                             1         12
SETB      bit                           2         12
SJMP      relative                      2         24
SUBB      A, #data8                     2         12
SUBB      A, @Ri                        1         12
SUBB      A, Rn                         1         12
SUBB      A, direct                     2         12
SWAP      A                             1         12
XCH       A, #data8                     2         12
XCH       A, @Ri                        1         12
XCH       A, Rn                         1         12
XCH       A, direct                     2         12
XCHD      A, #data8                     2         12
XCHD      A, @Ri                        1         12
XCHD      A, Rn                         1         12
XCHD      A, direct                     2         12
XRL       A, #data8                     2         12
XRL       A, @Ri                        1         12
XRL       A, Rn                         1         12
XRL       A, direct                     2         12
XRL       direct, #data8                3         12
XRL       direct, A                     2         12


AS31, An Intel 8031/8051 assembler, Ken Stauffer (University of Calgary)
Minor changes and HTML markup, Paul Stoffregen
http://www.pjrc.com/tech/8051/tools/as31-inst.html
Last updated: February 24, 2005
Status: HTML version adapted from original AS31 man page
Suggestions, comments, criticisms?? <paul@pjrc.com>